Tamar Christina writes:
>> I see you've changed it from:
>>
>> + rtx cc_reg = aarch64_gen_compare_reg (code, val, const0_rtx);
>> + rtx cmp_rtx = gen_rtx_fmt_ee (code, DImode, cc_reg, const0_rtx);
>> + emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[3]));
>>
>> to:
>>
>> + emit_jump
> I see you've changed it from:
>
> + rtx cc_reg = aarch64_gen_compare_reg (code, val, const0_rtx);
> + rtx cmp_rtx = gen_rtx_fmt_ee (code, DImode, cc_reg, const0_rtx);
> + emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[3]));
>
> to:
>
> + emit_jump_insn (gen_cbranchdi4 (operands[0]
Tamar Christina writes:
>> -Original Message-
>> From: Richard Sandiford
>> Sent: Tuesday, November 28, 2023 5:56 PM
>> To: Tamar Christina
>> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
>> ; Marcus Shawcroft
>> ; Kyrylo Tkachov
> -Original Message-
> From: Richard Sandiford
> Sent: Tuesday, November 28, 2023 5:56 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
> ; Marcus Shawcroft
> ; Kyrylo Tkachov
> Subject: Re: [PATCH 17/21]AArch64: Add implementatio
Richard Sandiford writes:
> Tamar Christina writes:
>> Hi All,
>>
>> This adds an implementation for conditional branch optab for AArch64.
>>
>> For e.g.
>>
>> void f1 ()
>> {
>> for (int i = 0; i < N; i++)
>> {
>> b[i] += a[i];
>> if (a[i] > 0)
>> break;
>> }
>> }
>>
>
Tamar Christina writes:
> Hi All,
>
> This adds an implementation for conditional branch optab for AArch64.
>
> For e.g.
>
> void f1 ()
> {
> for (int i = 0; i < N; i++)
> {
> b[i] += a[i];
> if (a[i] > 0)
> break;
> }
> }
>
> For 128-bit vectors we generate:
>
>
