Hi Eric,
On Wed, Nov 21, 2018 at 09:35:03AM +0100, Eric Botcazou wrote:
> > This is saying that *every* op except those very few works on the full
> > register. And that for every architecture that has W_R_O.
>
> That's still a progress over the previous situation.
Yes. But it feels more than
> This is saying that *every* op except those very few works on the full
> register. And that for every architecture that has W_R_O.
That's still a progress over the previous situation.
> It also only looks at the top code in the RTL, so it will say for example
> a rotate-and-mask is just fine,
Hi Eric,
On Tue, Nov 20, 2018 at 10:05:21AM +0100, Eric Botcazou wrote:
> +/* Return true if X is an operation that always operates on the full
> + registers for WORD_REGISTER_OPERATIONS architectures. */
> +
> +inline bool
> +word_register_operation_p (const_rtx x)
> +{
> + switch (GET_CODE (
This is a regression present on all active branches: the combiner wrongly
optimizes away a zero-extension on the ARM because it rewrites a ZERO_EXTRACT
from SImode to HImode after having recorded that the upper bits of the results
are cleared for WORD_REGISTER_OPERATIONS architectures.
I tried
