On Sat, Mar 18, 2017 at 11:23:56AM -0500, Segher Boessenkool wrote:
> > >So, no, I'm not okay with this. It is very expensive, it is doing open
> > >heart surgery on combine's internal structures (in a way that may or may
> > >not work), and all that to combine some insns in a case that should not
On Sat, Mar 18, 2017 at 11:23:56AM -0500, Segher Boessenkool wrote:
> Bootstrapped and regression checked on x86_64-linux and powerpc64-linux
> {-m32,-m64}.
Now also tested on aarch64-linux; no new failures.
Segher
> 2017-03-18 Segher Boessenkool
>
> PR rtl-optimization/79910
>
On Fri, Mar 17, 2017 at 04:23:57PM -0600, Jeff Law wrote:
> >>+ /* For combinations that may result in two insns, we have to gather
> >>+ some extra information about registers used, so that we can
> >>+ update all relevant LOG_LINKS later. */
> >
> >Please just refuse to do the combinati
On 03/17/2017 04:14 PM, Segher Boessenkool wrote:
Thanks for not cc:ing me on any of this.
There's really no need for getting upset. Bernd posted the message to
the patches list. That's sufficient.
On Wed, Mar 15, 2017 at 04:00:21PM +0100, Bernd Schmidt wrote:
+/* Set up a set of register
On 03/17/2017 04:16 PM, Segher Boessenkool wrote:
On Wed, Mar 15, 2017 at 12:09:18AM +0100, Bernd Schmidt wrote:
I suppose at the moment we don't do 2->2 combinations, so we could
conditionalize this on having an i1.
You suppose wrong. If one of the resulting insns is set_noop_p then
2->2 is
On Wed, Mar 15, 2017 at 12:09:18AM +0100, Bernd Schmidt wrote:
> I suppose at the moment we don't do 2->2 combinations, so we could
> conditionalize this on having an i1.
You suppose wrong. If one of the resulting insns is set_noop_p then
2->2 is allowed, for example. Also in the hopefully not
Thanks for not cc:ing me on any of this.
On Wed, Mar 15, 2017 at 04:00:21PM +0100, Bernd Schmidt wrote:
> +/* Set up a set of registers used in an insn. Called through note_uses,
> + arguments as described for that function. */
> +
> +static void
> +record_used_regs (rtx *xptr, void *data)
> +
On 03/15/2017 11:07 AM, Jeff Law wrote:
On 03/15/2017 09:00 AM, Bernd Schmidt wrote:
On 03/15/2017 12:09 AM, Bernd Schmidt wrote:
I'll retest with your
suggestion and with the bitmap creation conditional on i1 being nonnull.
Like this (also had to throw in a bitmap_empty_p). Retested as befo
On 03/15/2017 09:00 AM, Bernd Schmidt wrote:
On 03/15/2017 12:09 AM, Bernd Schmidt wrote:
I'll retest with your
suggestion and with the bitmap creation conditional on i1 being nonnull.
Like this (also had to throw in a bitmap_empty_p). Retested as before. Ok?
Yea, not surprised you needed th
On 03/15/2017 04:00 PM, Bernd Schmidt wrote:
On 03/15/2017 12:09 AM, Bernd Schmidt wrote:
I'll retest with your
suggestion and with the bitmap creation conditional on i1 being nonnull.
Like this (also had to throw in a bitmap_empty_p). Retested as before. Ok?
Oops, that one also has dbg_cnt
On 03/15/2017 12:09 AM, Bernd Schmidt wrote:
I'll retest with your
suggestion and with the bitmap creation conditional on i1 being nonnull.
Like this (also had to throw in a bitmap_empty_p). Retested as before. Ok?
Bernd
Index: gcc/combine.c
=
On 03/15/2017 12:03 AM, Jeff Law wrote:
On 03/10/2017 04:24 PM, Bernd Schmidt wrote:
PR rtl-optimization/79910
* combine.c (record_used_regs): New static function.
(try_combine): Handle situations where there is an additional
instruction between I2 and I3 which needs to have a L
On 03/10/2017 04:24 PM, Bernd Schmidt wrote:
In this PR, we have a few insns involved in two instruction combinations:
insn 16: set r100
insn 27: some calculation
insn 28: some calculation
insn 32: using r100
insn 33: using r100
insn 35: some calculation
Then we combine insns 27, 28 and 33, pro
In this PR, we have a few insns involved in two instruction combinations:
insn 16: set r100
insn 27: some calculation
insn 28: some calculation
insn 32: using r100
insn 33: using r100
insn 35: some calculation
Then we combine insns 27, 28 and 33, producing two output insns, As a
result, insn 28
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