Re: [x86 PATCH] PR target/106933: Limit TImode STV to SSA-like def-use chains.

2023-01-08 Thread Richard Biener via Gcc-patches
On Fri, Dec 23, 2022 at 12:10 AM Roger Sayle wrote: > > > With many thanks to H.J. for doing all the hard work, this patch resolves > two P1 regressions; PR target/106933 and PR target/106959. > > Although superficially similar, the i386 backend's two scalar-to-vector > (STV) passes perform their

Re: [x86 PATCH] PR target/106933: Limit TImode STV to SSA-like def-use chains.

2022-12-22 Thread Uros Bizjak via Gcc-patches
On Fri, Dec 23, 2022 at 12:09 AM Roger Sayle wrote: > > > With many thanks to H.J. for doing all the hard work, this patch resolves > two P1 regressions; PR target/106933 and PR target/106959. > > Although superficially similar, the i386 backend's two scalar-to-vector > (STV) passes perform their

[x86 PATCH] PR target/106933: Limit TImode STV to SSA-like def-use chains.

2022-12-22 Thread Roger Sayle
With many thanks to H.J. for doing all the hard work, this patch resolves two P1 regressions; PR target/106933 and PR target/106959. Although superficially similar, the i386 backend's two scalar-to-vector (STV) passes perform their transformations in importantly different ways. The original pass