Re: [x86 PATCH] Add peephole2 to reduce double word register shuffling.

2022-06-02 Thread Richard Biener via Gcc-patches
On Thu, Jun 2, 2022 at 11:48 AM Uros Bizjak via Gcc-patches wrote: > > On Thu, Jun 2, 2022 at 9:20 AM Roger Sayle wrote: > > > > The simple test case below demonstrates an interesting register > > allocation challenge facing x86_64, imposed by ABI requirements > > on int128. > > > > __int128 foo(

Re: [x86 PATCH] Add peephole2 to reduce double word register shuffling.

2022-06-02 Thread Uros Bizjak via Gcc-patches
On Thu, Jun 2, 2022 at 11:32 AM Uros Bizjak wrote: > > On Thu, Jun 2, 2022 at 9:20 AM Roger Sayle wrote: > > > > The simple test case below demonstrates an interesting register > > allocation challenge facing x86_64, imposed by ABI requirements > > on int128. > > > > __int128 foo(__int128 x, __in

Re: [x86 PATCH] Add peephole2 to reduce double word register shuffling.

2022-06-02 Thread Uros Bizjak via Gcc-patches
On Thu, Jun 2, 2022 at 9:20 AM Roger Sayle wrote: > > The simple test case below demonstrates an interesting register > allocation challenge facing x86_64, imposed by ABI requirements > on int128. > > __int128 foo(__int128 x, __int128 y) > { > return x+y; > } > > For which GCC currently generate

Re: [x86 PATCH] Add peephole2 to reduce double word register shuffling.

2022-06-02 Thread Richard Biener via Gcc-patches
On Thu, Jun 2, 2022 at 9:21 AM Roger Sayle wrote: > > The simple test case below demonstrates an interesting register > allocation challenge facing x86_64, imposed by ABI requirements > on int128. > > __int128 foo(__int128 x, __int128 y) > { > return x+y; > } > > For which GCC currently generate

[x86 PATCH] Add peephole2 to reduce double word register shuffling.

2022-06-02 Thread Roger Sayle
The simple test case below demonstrates an interesting register allocation challenge facing x86_64, imposed by ABI requirements on int128. __int128 foo(__int128 x, __int128 y) { return x+y; } For which GCC currently generates the unusual sequence: movq%rsi, %rax movq%rd