Steve Ellcey writes:
> * config/mips/mmips-cpus.def (74kc, 74kf2_1, 74kf, 74kf, 74kf1_1,
> 74kfx, 74kx, 74kf3_2): Add PTF_AVOID_IMADD.
> * config/mips/mips.c (mips_option_override): Set IMADD default.
> * config/mips/mips.h (PTF_AVOID_IMADD): New.
> (ISA_HAS_MADD_MSUB
On Mon, 2013-03-25 at 21:50 +, Richard Sandiford wrote:
> That's trivial enough not to need a retest, but please post the
> invoke.texi patch.
>
> Thanks,
> Richard
Ah, yes I always forget the documentation. Here is the complete patch.
It has the invoke.texi change at the bottom and I fixed
Steve Ellcey writes:
> On Mon, 2013-03-25 at 16:45 +, Richard Sandiford wrote:
>
>> -mllsc is a little different in that it can be used even when the
>> ISA doesn't support it (thanks to kernel emulation). -mimadd isn't
>> like that though: we only want to use MADD/MSUB if the ISA has it.
>>
On Mon, 2013-03-25 at 16:45 +, Richard Sandiford wrote:
> -mllsc is a little different in that it can be used even when the
> ISA doesn't support it (thanks to kernel emulation). -mimadd isn't
> like that though: we only want to use MADD/MSUB if the ISA has it.
> So I think it makes sense to
Steve Ellcey writes:
> On Sat, 2013-03-23 at 14:50 +, Richard Sandiford wrote:
>> This is similar in spirit to -mbranch-likely. It'd be good for consistency
>> if they were defined in a similar style. I think that means removing
>> !TARGET_MIPS16 from ISA_HAS_MADD_MSUB and instead having:
>>
On Sat, 2013-03-23 at 14:50 +, Richard Sandiford wrote:
> This is similar in spirit to -mbranch-likely. It'd be good for consistency
> if they were defined in a similar style. I think that means removing
> !TARGET_MIPS16 from ISA_HAS_MADD_MSUB and instead having:
>
> #define GENERATE_MADD_M
"Steve Ellcey " writes:
> While testing GCC on a 74k MIPS chip I noticed that by default the -mtune=74k*
> flags cause GCC to not use the integer madd/msub instructions. According to
> the checkin comments these were found to cause a performance hit over using
> individual mult and add/sub instru
While testing GCC on a 74k MIPS chip I noticed that by default the -mtune=74k*
flags cause GCC to not use the integer madd/msub instructions. According to
the checkin comments these were found to cause a performance hit over using
individual mult and add/sub instructions. I think there are some p
