"Steve Ellcey " writes:
> diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
> index 397c40a..ad03040 100644
> --- a/gcc/config/mips/mips.md
> +++ b/gcc/config/mips/mips.md
> @@ -6674,7 +6674,10 @@
> {
>if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A)
> /* Loongson 2[ef] and Lo
Someone using buildroot reported a problem to me that I tracked down to
compiling a routine containing __builtin_prefetch with '-march=loongson
-mabi=32'. When doing this the prefetch instruction on loongson generates
'ld' instead of 'lw' and then tries to put it into a delay slot. This
causes th
