On Sat, Nov 15, 2014 at 12:46 AM, Sandra Loosemore
wrote:
> On ARM targets, the stack is aligned to an 8-byte boundary, but when
> saving/restoring the VFP coprocessor registers in the function
> prologue/epilogue, it is possible for the 8-byte values to end up at
> locations that are 4-byte align
On 12/17/2014 03:18 PM, Sandra Loosemore wrote:
On 11/14/2014 05:46 PM, Sandra Loosemore wrote:
2014-11-14 Sandra Loosemore
Joshua Conner
Chris Jones
gcc/
* doc/invoke.texi (Option Summary): Add -malign-saved-fp-regs.
(ARM options): Document it.
* config/
On 11/14/2014 05:46 PM, Sandra Loosemore wrote:
2014-11-14 Sandra Loosemore
Joshua Conner
Chris Jones
gcc/
* doc/invoke.texi (Option Summary): Add -malign-saved-fp-regs.
(ARM options): Document it.
* config/arm/arm.h (arm_stack_offs
to:gcc-patches-ow...@gcc.gnu.org]
On
> Behalf Of Sandra Loosemore
> Sent: Friday, November 14, 2014 18:47
> To: GCC Patches
> Cc: Chris Jones; Joshua Conner
> Subject: [patch, arm] align saved FP regs on stack
>
> On ARM targets, the stack is aligned to an 8-byte boundary, but when
On ARM targets, the stack is aligned to an 8-byte boundary, but when
saving/restoring the VFP coprocessor registers in the function
prologue/epilogue, it is possible for the 8-byte values to end up at
locations that are 4-byte aligned but not 8-byte aligned. This can
result in a performance pe
