On 23 Mar 2011, at 14:52, "Chung-Lin Tang" wrote:
> Hi, in the ARM "casesi" expand pattern, when the table base index
> constant is 0x800, it is stored sign extended as an rtx (const_int
> 0x800) (assuming 64-bit HOST_WIDE_INT).
>
> Subtraction by adding GEN_INT(-INTVAL(operand
Hi, in the ARM "casesi" expand pattern, when the table base index
constant is 0x800, it is stored sign extended as an rtx (const_int
0x800) (assuming 64-bit HOST_WIDE_INT).
Subtraction by adding GEN_INT(-INTVAL(operands[1])) then creates
(const_int 0x8000), which is not sign-ex
