Re: [middle-end][PATCH] Update alignment_for_piecewise_move

2016-06-06 Thread Bernd Schmidt
On 06/02/2016 03:37 PM, H.J. Lu wrote: Are you planning to submit your patch before July? If not, I will resubmit mine and work out all the issues. It may take a long time to review and I have patches to enable SSE, AVX, AVX512 f memset and memcpy, which depend on it. I'd like to see them bef

Re: [middle-end][PATCH] Update alignment_for_piecewise_move

2016-06-02 Thread H.J. Lu
On Tue, Apr 26, 2016 at 11:39 AM, H.J. Lu wrote: > On Tue, Apr 26, 2016 at 11:31 AM, Bernd Schmidt wrote: >> On 04/26/2016 08:21 PM, Richard Sandiford wrote: >>> >>> "H.J. Lu" writes: I am working a patch to enable SSE, AVX and AVX512 for memcpy/memset optimization. x86 backend d

Re: [middle-end][PATCH] Update alignment_for_piecewise_move

2016-04-26 Thread H.J. Lu
On Tue, Apr 26, 2016 at 11:31 AM, Bernd Schmidt wrote: > On 04/26/2016 08:21 PM, Richard Sandiford wrote: >> >> "H.J. Lu" writes: >>> >>> I am working a patch to enable SSE, AVX and AVX512 for memcpy/memset >>> optimization. x86 backend defines MAX_BITSIZE_MODE_ANY_INT to 128 >>> to keep the OI

Re: [middle-end][PATCH] Update alignment_for_piecewise_move

2016-04-26 Thread Bernd Schmidt
On 04/26/2016 08:21 PM, Richard Sandiford wrote: "H.J. Lu" writes: I am working a patch to enable SSE, AVX and AVX512 for memcpy/memset optimization. x86 backend defines MAX_BITSIZE_MODE_ANY_INT to 128 to keep the OI and XI modes from confusing the compiler into thinking that these modes could

Re: [middle-end][PATCH] Update alignment_for_piecewise_move

2016-04-26 Thread Richard Sandiford
"H.J. Lu" writes: > I am working a patch to enable SSE, AVX and AVX512 for memcpy/memset > optimization. x86 backend defines MAX_BITSIZE_MODE_ANY_INT to 128 > to keep the OI and XI modes from confusing the compiler into thinking > that these modes could actually be used for computation. But the

[middle-end][PATCH] Update alignment_for_piecewise_move

2016-04-26 Thread H.J. Lu
I am working a patch to enable SSE, AVX and AVX512 for memcpy/memset optimization. x86 backend defines MAX_BITSIZE_MODE_ANY_INT to 128 to keep the OI and XI modes from confusing the compiler into thinking that these modes could actually be used for computation. But the OI and XI modes can be used