Hi!
On 2023-11-15T14:10:47+, Andrew Stubbs wrote:
> * gcc.target/gcn/avgpr-mem-double.c: New test.
> * gcc.target/gcn/avgpr-mem-int.c: New test.
> * gcc.target/gcn/avgpr-mem-long.c: New test.
> * gcc.target/gcn/avgpr-mem-short.c: New test.
> * gcc.target/gcn/avgp
AMD GPUs since CDNA1 have had a new register file with an additional 256
32-bit-by-64-lane vector registers. This doubles the number of vector
registers on the device, compared to previous models. The way the
hardware works is that the register file is divided between all the
running threads,
