Re: [aarch64] Fix target/69176

2016-01-18 Thread Richard Henderson
On 01/18/2016 02:04 AM, Richard Earnshaw (lists) wrote: +(define_constraint "Upl" + "A constraint that matches two uses of add instructions." That's not a particularly helpful description for external users of the compiler. I think that either needs to be sufficiently precise that people who

Re: [aarch64] Fix target/69176

2016-01-18 Thread Richard Earnshaw (lists)
> +(define_constraint "Upl" > + "A constraint that matches two uses of add instructions." That's not a particularly helpful description for external users of the compiler. I think that either needs to be sufficiently precise that people who understand the ISA but not the guts of GCC can use it,

[aarch64] Fix target/69176

2016-01-15 Thread Richard Henderson
See the PR for details, but basically, the plus operations are special so you can't just split out one of the alternatives to a different pattern. This merges the two-instruction add case back into the main plus pattern, and then adds peepholes and splitters to generate the same code as before. O