Re: [RFC PATCH v1 07/10] RISC-V: Recognize bexti in negated if-conversion

On 2/10/23 15:41, Philipp Tomsich wrote: While the positive case "if ((bits >> SHAMT) & 1)" for SHAMT 0..10 can trigger conversion into efficient branchless sequences - with Zbs (bexti + neg + and) - with Zicond (andi + czero.nez) the inverted/negated case results in andi a5,a0,1024

[RFC PATCH v1 07/10] RISC-V: Recognize bexti in negated if-conversion

While the positive case "if ((bits >> SHAMT) & 1)" for SHAMT 0..10 can trigger conversion into efficient branchless sequences - with Zbs (bexti + neg + and) - with Zicond (andi + czero.nez) the inverted/negated case results in andi a5,a0,1024 seqz a5,a5 neg a5,a5 and a5,a5,a1 due to how