Andrew Stubbs:
You still seem to have the unrelated preload bits in this patch, but
other than that, this looks fine.
Now committed with that one removed: r16-1661-g750bc2899844d6
In principle, we could use %Gn everywhere and use the address space
from the MEM to determine which cache to use,
On 23/06/2025 22:39, Tobias Burnus wrote:
This is more based on documentation reading that on testing
as still only limited MI300 testing has been done and seemingly
this code does not usually get touched.
MI300's "9.1.10 Memory Scope and Temporal Control" distinguishes
between scalar memory (9.
This is more based on documentation reading that on testing
as still only limited MI300 testing has been done and seemingly
this code does not usually get touched.
MI300's "9.1.10 Memory Scope and Temporal Control" distinguishes
between scalar memory (9.1.10.1) for which a single control bit exis