Re: [Patch,AVR]: Solve PR42210

2011-06-03 Thread Denis Chertykov
2011/5/28 Georg-Johann Lay : > Georg-Johann Lay wrote: >> >> Georg-Johann Lay wrote: >> >>> Richard Henderson wrote: >>> >>> Why are you adding "optimize" to all these insns?  None of them will be matched unless combine is run, which implies optimization. >>> >>> Here is a patch without o

Re: [Patch,AVR]: Solve PR42210

2011-05-28 Thread Georg-Johann Lay
Georg-Johann Lay wrote: Georg-Johann Lay wrote: Richard Henderson wrote: Why are you adding "optimize" to all these insns? None of them will be matched unless combine is run, which implies optimization. Here is a patch without optimize in the insn conditions. The optimize condition is st

Re: [Patch,AVR]: Solve PR42210

2011-05-16 Thread Georg-Johann Lay
Georg-Johann Lay schrieb: > Richard Henderson schrieb: > >> Why are you adding "optimize" to all these insns? None of them will >> be matched unless combine is run, which implies optimization. > > Here is a patch without optimize in the insn conditions. > > The optimize condition is still prese

Ping #1: [Patch,AVR]: Solve PR42210

2011-05-02 Thread Georg-Johann Lay
Georg-Johann Lay schrieb: > Richard Henderson schrieb: > >> Why are you adding "optimize" to all these insns? None of them will >> be matched unless combine is run, which implies optimization. > > Here is a patch without optimize in the insn conditions. > > The optimize condition is still prese

Re: [Patch,AVR]: Solve PR42210

2011-04-27 Thread Georg-Johann Lay
Richard Henderson schrieb: > Why are you adding "optimize" to all these insns? None of them will > be matched unless combine is run, which implies optimization. Here is a patch without optimize in the insn conditions. The optimize condition is still present in the insv expander because I do not

Re: [Patch,AVR]: Solve PR42210

2011-04-26 Thread Georg-Johann Lay
Richard Henderson schrieb: > On 04/26/2011 04:51 AM, Georg-Johann Lay wrote: >> As the SFRs are volatile, insv expander skips >> them and a combine pattern must care of them. Omitting the complicated >> bit-plethora patterns I still see long, slow shift loops for HI. So >> the patch still includes

Re: [Patch,AVR]: Solve PR42210

2011-04-26 Thread Richard Henderson
On 04/26/2011 04:51 AM, Georg-Johann Lay wrote: > As the SFRs are volatile, insv expander skips > them and a combine pattern must care of them. Omitting the complicated > bit-plethora patterns I still see long, slow shift loops for HI. So > the patch still includes them. Why don't we focus on doin

Re: [Patch,AVR]: Solve PR42210

2011-04-26 Thread Georg-Johann Lay
Richard Henderson schrieb: > On 04/21/2011 05:31 AM, Georg-Johann Lay wrote: >> +;; Some combiner patterns dealing with bits. >> +;; See PR42210 >> + >> +;; Move bit $3.$4 into bit $0.$4 >> +(define_insn "*movbitqi.1-6.a" > ... >> +(define_insn "*movbitqi.1-6.b" > ... >> +(define_insn "*movbitqi.0"

Re: [Patch,AVR]: Solve PR42210

2011-04-21 Thread Richard Henderson
On 04/21/2011 05:31 AM, Georg-Johann Lay wrote: > +;; Some combiner patterns dealing with bits. > +;; See PR42210 > + > +;; Move bit $3.$4 into bit $0.$4 > +(define_insn "*movbitqi.1-6.a" ... > +(define_insn "*movbitqi.1-6.b" ... > +(define_insn "*movbitqi.0" ... > +(define_insn "*movbitqi.7" This

Re: [Patch,AVR]: Solve PR42210

2011-04-21 Thread Georg-Johann Lay
Georg-Johann Lay schrieb: > This solves some missed optimization that can be seen when moving > around bits. > > There are 4 combiner patterns that operate on regs and one that uses > them as intermediate patterns and works on I/O. Even if just an > intermediate pattern matches it's still an impro

[Patch,AVR]: Solve PR42210

2011-04-20 Thread Georg-Johann Lay
This solves some missed optimization that can be seen when moving around bits. There are 4 combiner patterns that operate on regs and one that uses them as intermediate patterns and works on I/O. Even if just an intermediate pattern matches it's still an improvement because avoid of shift. Tested