On Tue, Sep 02, 2025 at 07:56:58AM +0200, Jakub Jelinek wrote:
> On Tue, Sep 02, 2025 at 09:32:15AM +0530, Surya Kumari Jangala wrote:
> > Ping.
> >
> > Please review.
>
> IMHO we shouldn't introduce new builtins for this, but instead
> use new flag bits in the upper bits of the memorder argument
Ping.
Please review.
Regards,
Surya
On 06/08/25 6:51 pm, Surya Kumari Jangala wrote:
> The PowerPC ISA has Load-And-Reserve and Store-Conditional instructions
> which can be used to construct a sequence of instructions that appears
> to perform an atomic update operation on an aligned storage lo
On Tue, Sep 2, 2025 at 7:26 PM Segher Boessenkool
wrote:
>
> On Tue, Sep 02, 2025 at 12:12:43PM +0200, Jakub Jelinek wrote:
> > On Tue, Sep 02, 2025 at 05:01:37AM -0500, Segher Boessenkool wrote:
> > > On Tue, Sep 02, 2025 at 07:56:58AM +0200, Jakub Jelinek wrote:
> > > > On Tue, Sep 02, 2025 at 0
On Tue, Sep 02, 2025 at 12:12:43PM +0200, Jakub Jelinek wrote:
> On Tue, Sep 02, 2025 at 05:01:37AM -0500, Segher Boessenkool wrote:
> > On Tue, Sep 02, 2025 at 07:56:58AM +0200, Jakub Jelinek wrote:
> > > On Tue, Sep 02, 2025 at 09:32:15AM +0530, Surya Kumari Jangala wrote:
> > > > Ping.
> > > >
On Tue, Sep 02, 2025 at 05:01:37AM -0500, Segher Boessenkool wrote:
> On Tue, Sep 02, 2025 at 07:56:58AM +0200, Jakub Jelinek wrote:
> > On Tue, Sep 02, 2025 at 09:32:15AM +0530, Surya Kumari Jangala wrote:
> > > Ping.
> > >
> > > Please review.
> >
> > IMHO we shouldn't introduce new builtins fo
On Tue, Sep 02, 2025 at 09:32:15AM +0530, Surya Kumari Jangala wrote:
> Ping.
>
> Please review.
IMHO we shouldn't introduce new builtins for this, but instead
use new flag bits in the upper bits of the memorder arguments.
See how x86 uses __ATOMIC_HLE_ACQUIRE and __ATOMIC_HLE_RELEASE
in there.