Re: [PING^1] [AArch64] Implement Bitwise AND and Set Flags

2013-03-28 Thread Marcus Shawcroft
On 26/03/13 11:35, Hurugalawadi, Naveen wrote: Hi, >>Can we split them into two different patches. Just and in one Thanks for reviewing the patch. I have split the patches for "and" separately as per your suggestion. Thanks, I've adjusted the patch to use the SHIFT iterator instead of ASH

RE: [PING^1] [AArch64] Implement Bitwise AND and Set Flags

2013-03-26 Thread Hurugalawadi, Naveen
Hi, >> Can we split them into two different patches. Just and in one Thanks for reviewing the patch. I have split the patches for "and" separately as per your suggestion. There were some doubts regarding the addressing modes supported by these instructions. The only source that could be referr

Re: [PING^1] [AArch64] Implement Bitwise AND and Set Flags

2013-03-26 Thread Marcus Shawcroft
On 26/03/13 10:17, Marcus Shawcroft wrote: On 26/03/13 10:06, Hurugalawadi, Naveen wrote: the second "set" in each pattern should have the "=r,rk" constraint rather than just "=r,r". If the destination operand is stack register, assembler generates error as follows:- Error: operand 1 should be

Re: [PING^1] [AArch64] Implement Bitwise AND and Set Flags

2013-03-26 Thread Marcus Shawcroft
On 26/03/13 10:06, Hurugalawadi, Naveen wrote: >>the second "set" in each pattern should have the "=r,rk" constraint >>rather than just "=r,r". If the destination operand is stack register, assembler generates error as follows:- Error: operand 1 should be an integer register -- `ands sp,x0,x1' T

RE: [PING^1] [AArch64] Implement Bitwise AND and Set Flags

2013-03-26 Thread Hurugalawadi, Naveen
Hi, Thanks for reviewing the patch and testcase. There were some doubts regarding the addressing modes supported by these instructions. The only source that could be referred was the AARCH64 assembler. Hence, these modifications are implemented as per the assembler. Please let me know if there s

Re: [PING^1] [AArch64] Implement Bitwise AND and Set Flags

2013-03-15 Thread Richard Henderson
On 2013-02-13 22:23, Hurugalawadi, Naveen wrote: bove +(define_insn "*andsi3_compare0_uxtw" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ +(and:SI (match_operand:SI 1 "register_operand" "%r,r") +(match_operand:SI 2 "aarch64_logical_operand" "r,K")) +(const_

RE: [PING^1] [AArch64] Implement Bitwise AND and Set Flags

2013-03-15 Thread Ian Bolton
> Please consider this as a reminder to review the patch posted at > following link:- > http://gcc.gnu.org/ml/gcc-patches/2013-01/msg01374.html > > The patch is slightly modified to use CC_NZ mode instead of CC. > > Please review the patch and let me know if its okay? > Hi Naveen, With the CC_

[PING^1] [AArch64] Implement Bitwise AND and Set Flags

2013-02-13 Thread Hurugalawadi, Naveen
Hi, Please consider this as a reminder to review the patch posted at following link:- http://gcc.gnu.org/ml/gcc-patches/2013-01/msg01374.html The patch is slightly modified to use CC_NZ mode instead of CC. Please review the patch and let me know if its okay? Thanks & Regards, Naveen.H.S --- gcc