Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

2024-07-31 Thread Carl Love
Kewen: On 7/29/24 3:21 AM, Kewen.Lin wrote: +@smallexample +@exdent vector signed __int128 vec_sld (vector signed __int128, +vector signed __int128, const unsigned int); +@exdent vector unsigned __int128 vec_sld (vector unsigned __int128, +vector unsigned __int128, const unsigned int); +@exden

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

2024-07-30 Thread Peter Bergner
On 7/30/24 10:17 AM, Carl Love wrote: > I tried, I hope I got it right, with -m32t: > > /* { dg-do run { target power10_hw } } */ > /* { dg-do compile { target { ! power10_hw } } } */ > /* { dg-require-effective-target int128 } */ > > This gives: > > # of unsupported tests 1 > > The

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

2024-07-30 Thread Carl Love
Peter, Kewen: Per Peter's request, I did the following testing on ltcd97-lp7 which is a Power 10 running in BE mode. On 7/29/24 8:47 AM, Peter Bergner wrote: Maybe the following will work? +/* { dg-do run { target power10_hw } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { d

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

2024-07-29 Thread Kewen.Lin
on 2024/7/29 23:47, Peter Bergner wrote: > On 7/29/24 5:21 AM, Kewen.Lin wrote: >> on 2024/7/27 06:37, Carl Love wrote: >>> --- /dev/null >>> +++ b/gcc/testsuite/gcc.target/powerpc/vec-shift-double-runnable-int128.c >>> @@ -0,0 +1,358 @@ >>> +/* { dg-do run { target power10_hw } } */ >>> +/* { dg-

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

2024-07-29 Thread Peter Bergner
On 7/29/24 5:21 AM, Kewen.Lin wrote: > on 2024/7/27 06:37, Carl Love wrote: >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/powerpc/vec-shift-double-runnable-int128.c >> @@ -0,0 +1,358 @@ >> +/* { dg-do run { target power10_hw } } */ >> +/* { dg-do link { target { ! power10_hw } } } */ >> +/* {

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

2024-07-29 Thread Kewen.Lin
Hi Carl, on 2024/7/27 06:37, Carl Love wrote: > GCC developers: > > Version 2, updated rs6000-overload.def to remove adding additonal internal > names and to change XXSLDWI_Q to XXSLDWI_1TI per comments from Kewen.  Move > new documentation statement for the PIVPR built-ins per comments from Ke

[PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

2024-07-26 Thread Carl Love
GCC developers: Version 2, updated rs6000-overload.def to remove adding additonal internal names and to change XXSLDWI_Q to XXSLDWI_1TI per comments from Kewen.  Move new documentation statement for the PIVPR built-ins per comments from Kewen.  Updated dg-do-run directive and added comment ab