Re: [PATCH v5 1/4] RISC-V: Add Zicfiss ISA extension.

2025-01-16 Thread Kito Cheng
LGTM for the V5 series :) On Thu, Jan 16, 2025 at 4:13 PM Monk Chiang wrote: > > This patch is implemented according to the RISC-V CFI specification. > It supports the generation of shadow stack instructions in the prologue, > epilogue, non-local gotos, and unwinding. > > RISC-V CFI SPEC: https:

[PATCH v5 1/4] RISC-V: Add Zicfiss ISA extension.

2025-01-16 Thread Monk Chiang
This patch is implemented according to the RISC-V CFI specification. It supports the generation of shadow stack instructions in the prologue, epilogue, non-local gotos, and unwinding. RISC-V CFI SPEC: https://github.com/riscv/riscv-cfi gcc/ChangeLog: * common/config/riscv/riscv-common.cc: