Re: [PATCH v5 09/11] RISC-V: Weaken mem_thread_fence

2023-05-03 Thread Martin Liška
On 5/3/23 14:18, Andreas Schwab via Gcc-patches wrote: > ../../gcc/config/riscv/sync.md: In function 'const char* > output_479(rtx_def**, rtx_insn*)': > ../../gcc/config/riscv/sync.md:66:1: error: control reaches end of non-void > function [-Werror=return-type] >66 | [(set (attr "length") (

Re: [PATCH v5 09/11] RISC-V: Weaken mem_thread_fence

2023-05-03 Thread Andreas Schwab via Gcc-patches
../../gcc/config/riscv/sync.md: In function 'const char* output_479(rtx_def**, rtx_insn*)': ../../gcc/config/riscv/sync.md:66:1: error: control reaches end of non-void function [-Werror=return-type] 66 | [(set (attr "length") (const_int 4))]) | ^ -- Andreas Schwab, SUSE Labs, sch...@

Re: [PATCH v5 09/11] RISC-V: Weaken mem_thread_fence

2023-04-28 Thread Jeff Law via Gcc-patches
On 4/27/23 10:22, Patrick O'Neill wrote: This change brings atomic fences in line with table A.6 of the ISA manual. Relax mem_thread_fence according to the memmodel given. 2023-04-27 Patrick O'Neill gcc/ChangeLog: * config/riscv/sync.md (mem_thread_fence_1): Change fence d

[PATCH v5 09/11] RISC-V: Weaken mem_thread_fence

2023-04-27 Thread Patrick O'Neill
This change brings atomic fences in line with table A.6 of the ISA manual. Relax mem_thread_fence according to the memmodel given. 2023-04-27 Patrick O'Neill gcc/ChangeLog: * config/riscv/sync.md (mem_thread_fence_1): Change fence depending on the given memory model. Signed-of