Re: [PATCH v5 08/11] RISC-V: Weaken LR/SC pairs

2023-04-28 Thread Jeff Law via Gcc-patches
On 4/27/23 10:22, Patrick O'Neill wrote: Introduce the %I and %J flags for setting the .aqrl bits on LR/SC pairs as needed. Atomic compare and exchange ops provide success and failure memory models. C++17 and later place no restrictions on the relative strength of each model, so ensure we cov

[PATCH v5 08/11] RISC-V: Weaken LR/SC pairs

2023-04-27 Thread Patrick O'Neill
Introduce the %I and %J flags for setting the .aqrl bits on LR/SC pairs as needed. Atomic compare and exchange ops provide success and failure memory models. C++17 and later place no restrictions on the relative strength of each model, so ensure we cover both by using a model that enforces the ord