Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector

2023-12-28 Thread joshua
oshua"; "gcc-patches" 抄 送:Jim Wilson; palmer; andrew; "philipp.tomsich"; jeffreyalaw; "christoph.muellner"; jinma; "cooper.qu" 主 题:Re: Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector Chnage it into vector_length_operand.

Re:Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector

2023-12-28 Thread joshua
ol_ref "INTVAL (operands[2])")) (set (attr "vlmul") (symbol_ref "INTVAL (operands[3])")) (set (attr "ta") (symbol_ref "INTVAL (operands[4])")) (set (attr "ma") (symbol_ref "INTVAL (operands[5])"))]) -------------------------- 发件人:juzhe.zh..

Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector

2023-12-28 Thread joshua
atches" 抄 送:Jim Wilson; palmer; andrew; "philipp.tomsich"; jeffreyalaw; "christoph.muellner"; jinma; "cooper.qu" 主 题:Re: 回复:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector No, we should handle this carefully step by step. First,

Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector

2023-12-28 Thread joshua
ilson; palmer; andrew; "philipp.tomsich"; jeffreyalaw; "christoph.muellner"; "cooper.joshua"; jinma; "cooper.qu" 主 题:Re: [PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector I am confused by the series patches. I thought this patch

回复:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector

2023-12-28 Thread joshua
ilson; palmer; andrew; "philipp.tomsich"; jeffreyalaw; "christoph.muellner"; "cooper.joshua"; jinma; "cooper.qu" 主 题:Re: [PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector I am confused by the series patches. I thought this patch: h

[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector

2023-12-28 Thread Jun Sha (Joshua)
This patch is to handle the differences in instruction generation between Vector and XTheadVector. In this version, we only support partial xtheadvector instructions that leverage directly from current RVV1.0 with simple adding "th." prefix. For different name xtheadvector instructions but share sa

[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector

2023-12-24 Thread Jun Sha (Joshua)
This patch is to handle the differences in instruction generation between Vector and XTheadVector. In this version, we only support partial xtheadvector instructions that leverage directly from current RVV1.0 with simple adding "th." prefix. For different name xtheadvector instructions but share sa