Re: [PATCH v4 1/4] Hard register constraints

2025-06-26 Thread Jeff Law
On 6/26/25 10:38 AM, Stefan Schulze Frielinghaus wrote: So you need a ChangeLog, but this is OK once the ChangeLog is cobbled together. I think you should wait to commit until all 4 patches in this series are ACK'd though. Thanks for reviewing/commenting all four patches. Very much apprec

Re: [PATCH v4 1/4] Hard register constraints

2025-06-26 Thread Stefan Schulze Frielinghaus
On Sat, Jun 21, 2025 at 09:06:42AM -0600, Jeff Law wrote: > > > On 5/20/25 1:22 AM, Stefan Schulze Frielinghaus wrote: > > Implement hard register constraints of the form {regname} where regname > > must be a valid register name for the target. Such constraints may be > > used in asm statements

Re: [PATCH v4 1/4] Hard register constraints

2025-06-26 Thread Stefan Schulze Frielinghaus
On Fri, Jun 20, 2025 at 10:17:20AM -0400, Vladimir Makarov wrote: > > On 5/20/25 3:22 AM, Stefan Schulze Frielinghaus wrote: > > Implement hard register constraints of the form {regname} where regname > > must be a valid register name for the target. Such constraints may be > > used in asm statem

Re: [PATCH v4 1/4] Hard register constraints

2025-06-21 Thread Jeff Law
On 5/20/25 1:22 AM, Stefan Schulze Frielinghaus wrote: Implement hard register constraints of the form {regname} where regname must be a valid register name for the target. Such constraints may be used in asm statements as a replacement for register asm and in machine descriptions. It is exp

Re: [PATCH v4 1/4] Hard register constraints

2025-06-20 Thread Vladimir Makarov
On 5/20/25 3:22 AM, Stefan Schulze Frielinghaus wrote: Implement hard register constraints of the form {regname} where regname must be a valid register name for the target. Such constraints may be used in asm statements as a replacement for register asm and in machine descriptions. --- gcc/c

[PATCH v4 1/4] Hard register constraints

2025-05-20 Thread Stefan Schulze Frielinghaus
Implement hard register constraints of the form {regname} where regname must be a valid register name for the target. Such constraints may be used in asm statements as a replacement for register asm and in machine descriptions. It is expected and desired that optimizations coalesce multiple pseud