[PATCH v4] RISC-V: Fix register overlap issue for some xtheadvector instructions

For th.vmadc/th.vmsbc as well as narrowing arithmetic instructions and floating-point compare instructions, an illegal instruction exception will be raised if the destination vector register overlaps a source vector register group. To handle this issue, we use "group_overlap" and "enabled" attribu

[PATCH v4] RISC-V: Fix register overlap issue for some xtheadvector instructions

For th.vmadc/th.vmsbc as well as narrowing arithmetic instructions and floating-point compare instructions, an illegal instruction exception will be raised if the destination vector register overlaps a source vector register group. To handle this issue, we use "group_overlap" and "enabled" attribu