Hi Jakub,
On Mon, Mar 03, 2014 at 10:08:53AM +0100, Jakub Jelinek wrote:
> On Mon, Mar 03, 2014 at 05:04:45PM +0800, lin zuojian wrote:
> > > No. As I wrote earlier, the alternative is to use unaligned stores for
> > > ARM,
> > > I've asked Lin to benchmark that compared to his patch, but haven'
Okay,I will use mutt as my MUA.
--
Regards
lin zuojian
On Mon, Mar 03, 2014 at 09:58:59AM +0100, Jakub Jelinek wrote:
> On Mon, Mar 03, 2014 at 04:51:20PM +0800, lin zuojian wrote:
> > Hi Jakub,
> > Any comments on this patch?
>
> Can you please repost the patch (+ ChangeLog entry) as attachm
On Mon, Mar 03, 2014 at 05:04:45PM +0800, lin zuojian wrote:
> > No. As I wrote earlier, the alternative is to use unaligned stores for ARM,
> > I've asked Lin to benchmark that compared to his patch, but haven't seen
> > that done yet.
> I have not benchmark yet.But according to what I hear from
Hi Jakub,
> No. As I wrote earlier, the alternative is to use unaligned stores for ARM,
> I've asked Lin to benchmark that compared to his patch, but haven't seen
> that done yet.
>
> Jakub
I have not benchmark yet.But according to what I hear from an ARM Engineer in
Huawei,
unaligned acc
On Mon, Mar 03, 2014 at 04:51:20PM +0800, lin zuojian wrote:
> Hi Jakub,
> Any comments on this patch?
Can you please repost the patch (+ ChangeLog entry) as attachment?
Or use saner MUA? When all tabs are eaten and other whitespace crippled,
it is impossible to look at the formatting.
On Sat, Mar 01, 2014 at 08:22:32PM +0100, Bernd Edlinger wrote:
> So, that is what I mean: this patch makes the stack grow by
> 32 bytes, just because the emit_stack_protection uses SImode,
> with unaligned addresses which is not possible for ARM, and
> not optimal for X86_64.
Incorrect, for this
On Fri, Feb 28, 2014 at 08:47:56AM +0100, Bernd Edlinger wrote:
> I see the problem too.
>
> But I think it is not necessary to change the stack alignment
> to solve the problem.
>
> It appears to me that the code in asan_emit_stack_protection
> is just wrong. It uses SImode when the memory is no
Hi Jakub,
Any comments on this patch?
--
Regards
lin zuojian
On Tue, Feb 25, 2014 at 03:28:14PM +0800, lin zuojian wrote:
> Sorry,I have forgot setting another shadow_mem's align.And many strbs
> bump up.
> Here 's patch v4.(last one contains html,damn thunderbird).
>
> --
> Without aligning
Hi Bernd,
I think about whether the best mode is so important to x86_64.There
is no mov r/m64,imm64 refering to Intel Software Developer's Manual
Volume 2A 3-505.imm32 is the biggest number.And asan clears stack
using imms.
And even if there is a mov r/m64,imm64 in the future.The gcc
Hi Bernd,
You may send a patch too.Your idea will be more clear.
--
Regards
lin zuojian
On Sun, Mar 02, 2014 at 10:24:52AM +0800, lin zuojian wrote:
> Hi Bernd,
>
> set_mem_align is not working like magic.
>
> set_mem_align just set the alignment of a memory rtx.And You must aware
> that you do
Hi Bernd,
set_mem_align is not working like magic.
set_mem_align just set the alignment of a memory rtx.And You must aware
that you do so because you are sure this rtx IS aligned like this.
For arm machines, the base the virtual registers are aligned to 8
bytes.You can't just set_mem_align to get
Hi Lin,
On Fri, 28 Feb 2014 19:14:11, lin zuojian wrote:
>
> 于 2014年02月28日 15:58, lin zuojian 写道:
>> Hi Bernd,
>> I agree you with the mode problem.
>>
>> And I have not change the stack alignment.What I change is the virtual
>> register base's alignment.
I tried your patch on this test case:
gc
于 2014年02月28日 15:58, lin zuojian 写道:
> Hi Bernd,
> I agree you with the mode problem.
>
> And I have not change the stack alignment.What I change is the virtual
> register base's alignment.
> Realignment must be make in !STRICT_ALIGNMENT machine,or emitting the
> efficient code is impossible.
Sorry
Hi Bernd,
I agree you with the mode problem.
And I have not change the stack alignment.What I change is the virtual
register base's alignment.
Realignment must be make in !STRICT_ALIGNMENT machine,or emitting the
efficient code is impossible.
For example 4 set mem:QI X,REG:QI Y will not combine in
Hi,
I see the problem too.
But I think it is not necessary to change the stack alignment
to solve the problem.
It appears to me that the code in asan_emit_stack_protection
is just wrong. It uses SImode when the memory is not aligned
enough for that mode. This would not happen if that code
is rew
Sorry,I have forgot setting another shadow_mem's align.And many strbs
bump up.
Here 's patch v4.(last one contains html,damn thunderbird).
--
Without aligning the asan stack base,this base will only 64-bit aligned
in ARM machines.
But asan require 256-bit aligned base because of this:
1.right shif
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