Re: [PATCH v3 0/4] Hard Register Constraints

2025-01-27 Thread Jeff Law
On 1/26/25 12:24 PM, Jakub Jelinek wrote: On Sun, Jan 26, 2025 at 08:35:29AM -0700, Jeff Law wrote: On 1/23/25 8:49 AM, Stefan Schulze Frielinghaus wrote: On Sat, Jan 18, 2025 at 09:36:14AM -0700, Jeff Law wrote: [...] Do we detect conflicts between a hard register constraint and another co

Re: [PATCH v3 0/4] Hard Register Constraints

2025-01-26 Thread Jakub Jelinek
On Sun, Jan 26, 2025 at 08:35:29AM -0700, Jeff Law wrote: > On 1/23/25 8:49 AM, Stefan Schulze Frielinghaus wrote: > > On Sat, Jan 18, 2025 at 09:36:14AM -0700, Jeff Law wrote: > > [...] > > > > > Do we detect conflicts between a hard register constraint and another > > > > > constraint which requi

Re: [PATCH v3 0/4] Hard Register Constraints

2025-01-26 Thread Jeff Law
On 1/23/25 8:49 AM, Stefan Schulze Frielinghaus wrote: On Sat, Jan 18, 2025 at 09:36:14AM -0700, Jeff Law wrote: [...] Do we detect conflicts between a hard register constraint and another constraint which requires a singleton class? That's going to be an error I suspect, but curious if it's

Re: [PATCH v3 0/4] Hard Register Constraints

2025-01-23 Thread Stefan Schulze Frielinghaus
On Sat, Jan 18, 2025 at 09:36:14AM -0700, Jeff Law wrote: [...] > > > Do we detect conflicts between a hard register constraint and another > > > constraint which requires a singleton class? That's going to be an error > > > I > > > suspect, but curious if it's handled. > > > > That is a good po

Re: [PATCH v3 0/4] Hard Register Constraints

2025-01-18 Thread Jeff Law
On 1/16/25 1:32 AM, Stefan Schulze Frielinghaus wrote: Conceptually I see the value in being able to being able to specify a specific register in an asm. The single register class constraints found on x86 have effectively given that port that capability, but others which truly general purpo

Re: [PATCH v3 0/4] Hard Register Constraints

2025-01-16 Thread Stefan Schulze Frielinghaus
On Wed, Jan 15, 2025 at 10:29:03PM -0700, Jeff Law wrote: > > > On 11/29/24 2:15 AM, Stefan Schulze Frielinghaus wrote: > > Ping. > > > > On Fri, Oct 25, 2024 at 11:57:16AM +0200, Stefan Schulze Frielinghaus wrote: > > > This is a follow-up to > > > https://gcc.gnu.org/pipermail/gcc-patches/2024

Re: [PATCH v3 0/4] Hard Register Constraints

2025-01-15 Thread Jeff Law
On 11/29/24 2:15 AM, Stefan Schulze Frielinghaus wrote: Ping. On Fri, Oct 25, 2024 at 11:57:16AM +0200, Stefan Schulze Frielinghaus wrote: This is a follow-up to https://gcc.gnu.org/pipermail/gcc-patches/2024-September/663238.html The primary changes are about error handling and documentati

Re: [PATCH v3 0/4] Hard Register Constraints

2025-01-08 Thread Stefan Schulze Frielinghaus
Hi Vladimir, Would you be willing to have a look at the LRA part? This basically only involves patch number 1, i.e., https://gcc.gnu.org/pipermail/gcc-patches/2024-October/666455.html Would be great to get some feedback whether the current approach is feasible or whether I should drop this patch.

Re: [PATCH v3 0/4] Hard Register Constraints

2024-11-29 Thread Stefan Schulze Frielinghaus
Ping. On Fri, Oct 25, 2024 at 11:57:16AM +0200, Stefan Schulze Frielinghaus wrote: > This is a follow-up to > https://gcc.gnu.org/pipermail/gcc-patches/2024-September/663238.html > > The primary changes are about error handling and documentation updates. > Now, we error out whenever a hard regist

[PATCH v3 0/4] Hard Register Constraints

2024-10-25 Thread Stefan Schulze Frielinghaus
This is a follow-up to https://gcc.gnu.org/pipermail/gcc-patches/2024-September/663238.html The primary changes are about error handling and documentation updates. Now, we error out whenever a hard register constraint is used more than once across an alternative for outputs or inputs. For example