Re: [PATCH v3] RISC-V: Fix regression of -fzero-call-used-regs=all

2023-04-10 Thread Jeff Law via Gcc-patches
On 4/9/23 21:11, Kito Cheng wrote: I think one keypoint here is -fzero-call-used-regs=* emit zeroing instruction before return, that means there won't be any vector operations between return and zeroing instructions, so we don't need to restore the vcsr after zeroing. Oh yea, makes perfect

Re: [PATCH v3] RISC-V: Fix regression of -fzero-call-used-regs=all

2023-04-09 Thread Kito Cheng via Gcc-patches
> > Do you need to save/restore the vector configuration before and after > > clearing the vector registers?If so, that seems to be missing. If > > not, it seems like a comment explaining why would be useful. > > I'll add some comments in the code and want to explain here first. > We need not

RE: [PATCH v3] RISC-V: Fix regression of -fzero-call-used-regs=all

2023-04-09 Thread Wang, Yanzhang via Gcc-patches
Thanks Jeff's comment. > Presumably the difficulty here is we need to find a suitable hard > register so that we can emit the vsetvl. Yes. We use the GPR which has been flagged in the need_zeroed_regs to hold the vl. There should be one GPR we can use, otherwise, will throw an exception. > Do

Re: [PATCH v3] RISC-V: Fix regression of -fzero-call-used-regs=all

2023-04-08 Thread Jeff Law via Gcc-patches
On 4/7/23 06:32, yanzhang.wang--- via Gcc-patches wrote: From: Yanzhang Wang This patch registers a riscv specific function to TARGET_ZERO_CALL_USED_REGS instead of default in targhooks.cc. It will clean gpr and vector relevant registers. PR 109104 gcc/ChangeLog: * config/

[PATCH v3] RISC-V: Fix regression of -fzero-call-used-regs=all

2023-04-07 Thread yanzhang.wang--- via Gcc-patches
From: Yanzhang Wang This patch registers a riscv specific function to TARGET_ZERO_CALL_USED_REGS instead of default in targhooks.cc. It will clean gpr and vector relevant registers. PR 109104 gcc/ChangeLog: * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): * confi