> On 5/29/22 20:50, Kito Cheng via Gcc-patches wrote:
> > Committed, thanks!
>
> Can this be backported to gcc-12 please.
I want to say yes but 9ddd44b58649d1d ("RISC-V: Provide `fmin'/`fmax'
RTL pattern") only existing in the trunk, and
gcc.target/riscv/pr105666.c part has fixed[1] during backpor
On 5/29/22 20:50, Kito Cheng via Gcc-patches wrote:
Committed, thanks!
Can this be backported to gcc-12 please.
Thx,
-Vineet
On Fri, May 27, 2022 at 10:37 AM Vineet Gupta wrote:
Commit 9ddd44b58649d1d ("RISC-V: Provide `fmin'/`fmax' RTL pattern") added
tests which check for hard float in
On Thu, 26 May 2022, Vineet Gupta wrote:
> Commit 9ddd44b58649d1d ("RISC-V: Provide `fmin'/`fmax' RTL pattern") added
> tests which check for hard float instructions which obviously fails on
> soft-float ABI builds.
Sorry to miss it and thank you for the fix!
Maciej
Committed, thanks!
On Fri, May 27, 2022 at 10:37 AM Vineet Gupta wrote:
>
> Commit 9ddd44b58649d1d ("RISC-V: Provide `fmin'/`fmax' RTL pattern") added
> tests which check for hard float instructions which obviously fails on
> soft-float ABI builds.
>
> And my recent commit b646d7d279ae ("RISC-V:
Commit 9ddd44b58649d1d ("RISC-V: Provide `fmin'/`fmax' RTL pattern") added
tests which check for hard float instructions which obviously fails on
soft-float ABI builds.
And my recent commit b646d7d279ae ("RISC-V: Inhibit FP <--> int register
moves via tune param") is guilty of same crime.
So cons
