YunQiang Su 于2021年9月3日周五 上午9:53写道：
>
> Maciej W. Rozycki 于2021年9月3日周五 上午9:48写道：
> >
> > On Thu, 2 Sep 2021, YunQiang Su wrote:
> >
> > > diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
> > > index 493d3de48..743a1d0fe 100644
> > > --- a/gcc/config/mips/mips.c
> > > +++ b/gcc/config/m
Maciej W. Rozycki 于2021年9月3日周五 上午9:48写道：
>
> On Thu, 2 Sep 2021, YunQiang Su wrote:
>
> > diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
> > index 493d3de48..743a1d0fe 100644
> > --- a/gcc/config/mips/mips.c
> > +++ b/gcc/config/mips/mips.c
> > @@ -9896,6 +9896,12 @@ mips_file_start
On Thu, 2 Sep 2021, YunQiang Su wrote:
> diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
> index 493d3de48..743a1d0fe 100644
> --- a/gcc/config/mips/mips.c
> +++ b/gcc/config/mips/mips.c
> @@ -9896,6 +9896,12 @@ mips_file_start (void)
>else
> fputs ("\t.module\tnooddspreg\n",
Currently, the asm output file for MIPS has no rev info.
It can make some trouble, for example:
assembler is mips1 by default,
gcc is fpxx by default.
To assemble the output of gcc -S, we have to pass -mips2
to assembler.
The same situation is for some CPU has extension insn.
Octeon is an ex
