Re: [PATCH v2 3/4] RISC-V: Add zero_extract support for rv64gc

2024-05-08 Thread Jeff Law
On 5/8/24 1:36 AM, Christoph Müllner wrote: The combiner attempts to optimize a zero-extension of a logical right shift using zero_extract. We already utilize this optimization for those cases that result in a single instructions. Let's add a insn_and_split pattern that also matches the gener

[PATCH v2 3/4] RISC-V: Add zero_extract support for rv64gc

2024-05-08 Thread Christoph Müllner
The combiner attempts to optimize a zero-extension of a logical right shift using zero_extract. We already utilize this optimization for those cases that result in a single instructions. Let's add a insn_and_split pattern that also matches the generic case, where we can emit an optimized sequence