Re: [PATCH v2 3/3] RISC-V: Add support for XCVbi extension in CV32E40P

Hi Mary, GCC tip-of-tree with this patch series applied fails to build glibc with: --with-arch=rv32imac --with-abi=ilp32 --with-arch=rv32imafdc --with-abi=ilp32d Failing command: ./bin/riscv32-unknown-elf-gcc -B/scratch/tc-testing/tc-nov-13-zcvbi-series/build/build-newlib/riscv32-unknown-elf/ne

Re: [PATCH v2 3/3] RISC-V: Add support for XCVbi extension in CV32E40P

I would prefer you suppress those patterns in riscv.cc rather than adjust the including order, T-Head extension goes that way too, so I would prefer to keep it using a consistent way. you can search !TARGET_XTHEAD in riscv.md On Mon, Nov 13, 2023 at 9:36 PM Mary Bennett wrote: > > Spec: > gith

[PATCH v2 3/3] RISC-V: Add support for XCVbi extension in CV32E40P

Spec: github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md Contributors: Mary Bennett Nandni Jamnadas Pietra Ferreira Charlie Keaney Jessica Mills Craig Blackmore Simon Cook Jeremy Bennett Helene Chelin gcc/ChangeLog: * common/config/