Re: [PATCH v2 2/2] RISC-V: Add testcase for rv32 SAT_MUL from uint64

On 7/12/25 2:58 AM, pan2...@intel.com wrote: From: Pan Li Add the run and asm testcase for rv32 SAT_MUL, widen mul from uint8_t, uint16_t, uint32_t to uint64_t. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat/sat_u_mul-1-u16-from-u64.c: New test. * gcc.target/riscv/sat/sat_

[PATCH v2 2/2] RISC-V: Add testcase for rv32 SAT_MUL from uint64

From: Pan Li Add the run and asm testcase for rv32 SAT_MUL, widen mul from uint8_t, uint16_t, uint32_t to uint64_t. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat/sat_u_mul-1-u16-from-u64.c: New test. * gcc.target/riscv/sat/sat_u_mul-1-u32-from-u64.c: New test. * gcc.ta