On Thu, Mar 18, 2021 at 05:13:38PM +0100, Jakub Jelinek wrote:
> On Thu, Mar 18, 2021 at 09:27:17AM +0800, Xionghu Luo via Gcc-patches wrote:
> > gcc/ChangeLog:
> >
> > 2021-03-18 Xionghu Luo
> >
> > PR target/98914
> > * config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9):
> >
On Thu, Mar 18, 2021 at 09:27:17AM +0800, Xionghu Luo via Gcc-patches wrote:
> gcc/ChangeLog:
>
> 2021-03-18 Xionghu Luo
>
> PR target/98914
> * config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9):
> Convert idx to DImode.
> (rs6000_expand_vector_set_var_p8): Likew
On 2021/3/17 15:53, Jakub Jelinek wrote:
On Wed, Mar 17, 2021 at 11:35:18AM +0800, Xionghu Luo wrote:
+ machine_mode idx_mode = GET_MODE (idx);
+ if (idx_mode != DImode)
+idx = convert_modes (DImode, idx_mode, idx, 1);
Segher mentioned you can remove the if (idx_mode != DImode) too,
co
On Wed, Mar 17, 2021 at 11:35:18AM +0800, Xionghu Luo wrote:
> + machine_mode idx_mode = GET_MODE (idx);
> + if (idx_mode != DImode)
> +idx = convert_modes (DImode, idx_mode, idx, 1);
Segher mentioned you can remove the if (idx_mode != DImode) too,
convert_modes has an early if (mode == oldm
Thanks Jakub & Segher,
On 2021/3/17 06:47, Segher Boessenkool wrote:
Hi!
On Tue, Mar 16, 2021 at 07:57:17PM +0100, Jakub Jelinek wrote:
On Thu, Mar 11, 2021 at 07:57:23AM +0800, Xionghu Luo via Gcc-patches wrote:
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index ec068
Hi!
On Tue, Mar 16, 2021 at 07:57:17PM +0100, Jakub Jelinek wrote:
> On Thu, Mar 11, 2021 at 07:57:23AM +0800, Xionghu Luo via Gcc-patches wrote:
> > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
> > index ec068c58aa5..48eb91132a9 100644
> > --- a/gcc/config/rs6000/rs6000.c
On Thu, Mar 11, 2021 at 07:57:23AM +0800, Xionghu Luo via Gcc-patches wrote:
> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
> index ec068c58aa5..48eb91132a9 100644
> --- a/gcc/config/rs6000/rs6000.c
> +++ b/gcc/config/rs6000/rs6000.c
> @@ -7000,11 +7000,15 @@ rs6000_expand_v
Ping^2 for stage 4 P1 issue and attached the patch, Thanks!
On 2021/3/3 09:12, Xionghu Luo via Gcc-patches wrote:
On 2021/2/25 14:33, Xionghu Luo via Gcc-patches wrote:
On 2021/2/25 00:57, Segher Boessenkool wrote:
Hi!
On Wed, Feb 24, 2021 at 09:06:24AM +0800, Xionghu Luo wrote:
vec_ins
On 2021/2/25 14:33, Xionghu Luo via Gcc-patches wrote:
>
>
> On 2021/2/25 00:57, Segher Boessenkool wrote:
>> Hi!
>>
>> On Wed, Feb 24, 2021 at 09:06:24AM +0800, Xionghu Luo wrote:
>>> vec_insert defines the element argument type to be signed int by ELFv2
>>> ABI, When expanding a vector with a
On 2021/2/25 00:57, Segher Boessenkool wrote:
> Hi!
>
> On Wed, Feb 24, 2021 at 09:06:24AM +0800, Xionghu Luo wrote:
>> vec_insert defines the element argument type to be signed int by ELFv2
>> ABI, When expanding a vector with a variable rtx, convert the rtx type
>> SImode.
>
> But that is tr
Hi!
On Wed, Feb 24, 2021 at 09:06:24AM +0800, Xionghu Luo wrote:
> vec_insert defines the element argument type to be signed int by ELFv2
> ABI, When expanding a vector with a variable rtx, convert the rtx type
> SImode.
But that is true for the intrinsics, not for all other callers of
rs6000_exp
vec_insert defines the element argument type to be signed int by ELFv2
ABI, When expanding a vector with a variable rtx, convert the rtx type
SImode.
gcc/ChangeLog:
2021-02-24 Xionghu Luo
PR target/98914
* config/rs6000/rs6000.c (rs6000_expand_vector_set): Convert
elt_
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