Committed, thanks Kito.
Pan
From: Kito Cheng
Sent: Wednesday, August 16, 2023 1:57 PM
To: Li, Pan2
Cc: GCC Patches ; 钟居哲 ; Wang,
Yanzhang
Subject: Re: [PATCH v2] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic
API
LGTM
mailto:pan2...@intel.com>> 於 2023年8月16日 週三 13:17 寫道：
Fro
LGTM
於 2023年8月16日 週三 13:17 寫道：
> From: Pan Li
>
> This patch would like to support the rounding mode API for the
> VFCVT.X.F.V as the below samples.
>
> * __riscv_vfcvt_x_f_v_i32m1_rm
> * __riscv_vfcvt_x_f_v_i32m1_rm_m
>
> Signed-off-by: Pan Li
>
> gcc/ChangeLog:
>
> * config/riscv/ris
From: Pan Li
This patch would like to support the rounding mode API for the
VFCVT.X.F.V as the below samples.
* __riscv_vfcvt_x_f_v_i32m1_rm
* __riscv_vfcvt_x_f_v_i32m1_rm_m
Signed-off-by: Pan Li
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(enum frm_op_type):
