Committed, thanks Juzhe.
Pan
From: 钟居哲
Sent: Sunday, September 24, 2023 2:06 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng ; patrick
Subject: Re: [PATCH v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
LGTM
juzhe.zh
LGTM
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-09-24 13:50
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng; patrick
Subject: [PATCH v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
From: Pan Li
When broadcast the reperated element, we take the mask_int_mode
From: Pan Li
When broadcast the reperated element, we take the mask_int_mode
by mistake. This patch would like to fix it by leveraging the machine
mode of the element.
The below test case in RV32 will be fixed.
* gcc/testsuite/gfortran.dg/overload_5.f90
PR target/111546
gcc/ChangeLog:
