RE: [PATCH v2] RISC-V: Eliminate latter vsetvl when fused

Committed. Pan From: 钟居哲 Sent: Thursday, September 12, 2024 12:40 PM To: Bohan Lei ; gcc-patches Cc: Li, Pan2 Subject: Re: [PATCH v2] RISC-V: Eliminate latter vsetvl when fused LGTM juzhe.zh...@rivai.ai<mailto:juzhe.zh...@rivai.ai> From: Boh

Re: [PATCH v2] RISC-V: Eliminate latter vsetvl when fused

LGTM juzhe.zh...@rivai.ai From: Bohan Lei Date: 2024-09-12 12:38 To: gcc-patches CC: juzhe.zhong Subject: [PATCH v2] RISC-V: Eliminate latter vsetvl when fused Resent to cc Juzhe. -- Hi all, A simple assembly check has been added in this version. Previous version: https

[PATCH v2] RISC-V: Eliminate latter vsetvl when fused

Resent to cc Juzhe. -- Hi all, A simple assembly check has been added in this version. Previous version: https://gcc.gnu.org/pipermail/gcc-patches/2024-September/662783.html Thanks, Bohan -- The current vsetvl pass eliminates a vsetvl instruction when the previous info is "available,"

[PATCH v2] RISC-V: Eliminate latter vsetvl when fused

Hi all, A simple assembly check has been added in this version. Previous version: https://gcc.gnu.org/pipermail/gcc-patches/2024-September/662783.html Thanks, Bohan -- The current vsetvl pass eliminates a vsetvl instruction when the previous info is "available," but does not when "compatibl