Re: [PATCH v2] [aarch64] Correct the maximum shift amount for shifted operands.

2018-11-09 Thread Andrew Pinski
On Fri, Nov 9, 2018 at 3:39 AM wrote: > > From: Christoph Muellner > > The aarch64 ISA specification allows a left shift amount to be applied > after extension in the range of 0 to 4 (encoded in the imm3 field). > > This is true for at least the following instructions: > > * ADD (extend register

Re: [PATCH v2] [aarch64] Correct the maximum shift amount for shifted operands.

2018-11-09 Thread Kyrill Tkachov
Hi Christoph, On 09/11/18 11:38, christoph.muell...@theobroma-systems.com wrote: From: Christoph Muellner The aarch64 ISA specification allows a left shift amount to be applied after extension in the range of 0 to 4 (encoded in the imm3 field). This is true for at least the following instruc

[PATCH v2] [aarch64] Correct the maximum shift amount for shifted operands.

2018-11-09 Thread christoph . muellner
From: Christoph Muellner The aarch64 ISA specification allows a left shift amount to be applied after extension in the range of 0 to 4 (encoded in the imm3 field). This is true for at least the following instructions: * ADD (extend register) * ADDS (extended register) * SUB (extended registe