Re: [PATCH v1 3/8] RISC-V: Add testcases for scalar unsigned SAT_SUB form 5

2024-06-13 Thread juzhe.zh...@rivai.ai
LGTM juzhe.zh...@rivai.ai From: pan2.li Date: 2024-06-14 10:13 To: gcc-patches CC: juzhe.zhong; kito.cheng; jeffreyalaw; rdapp.gcc; Pan Li Subject: [PATCH v1 3/8] RISC-V: Add testcases for scalar unsigned SAT_SUB form 5 From: Pan Li After the middle-end support the form 5 of unsigned

[PATCH v1 3/8] RISC-V: Add testcases for scalar unsigned SAT_SUB form 5

2024-06-13 Thread pan2 . li
From: Pan Li After the middle-end support the form 5 of unsigned SAT_SUB and the RISC-V backend implement the scalar .SAT_SUB, add more test case to cover the form 5 of unsigned .SAT_SUB. Form 5: #define SAT_SUB_U_5(T) \ T sat_sub_u_5_##T (T x, T y) \ { \ return x < y ? 0 : x - y; \