RE: [PATCH v1] RISC-V: Support RVVDImode for avg3_floor auto vect

2025-07-14 Thread Li, Pan2
; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com; Chen, Ken ; Liu, Hongtao ; Li, Pan2 Subject: [PATCH v1] RISC-V: Support RVVDImode for avg3_floor auto vect From: Pan Li The avg3_floor pattern leverage the add and shift rtl with the DOUBLE_TRUNC mode iterator. Aka, RVVDImode

[PATCH v1] RISC-V: Support RVVDImode for avg3_floor auto vect

2025-07-14 Thread pan2 . li
From: Pan Li The avg3_floor pattern leverage the add and shift rtl with the DOUBLE_TRUNC mode iterator. Aka, RVVDImode iterator will generate avg3rvvsimode_floor, only the element size QI, HI and SI are allowed. Thus, this patch would like to support the DImode by the standard name, with the it