RE: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode

2023-09-05 Thread Li, Pan2 via Gcc-patches
Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Tuesday, September 5, 2023 7:14 PM To: Li, Pan2 ; gcc-patches Cc: Li, Pan2 ; Wang, Yanzhang ; kito.cheng Subject: Re: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode LGTM juzhe.zh

Re: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode

2023-09-05 Thread juzhe.zh...@rivai.ai
LGTM juzhe.zh...@rivai.ai From: pan2.li Date: 2023-09-05 18:32 To: gcc-patches CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng Subject: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode From: Pan Li This patch would like to allow the VLS mode autovec for the floating-point binary

[PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode

2023-09-05 Thread Pan Li via Gcc-patches
From: Pan Li This patch would like to allow the VLS mode autovec for the floating-point binary operation MAX/MIN. Given below code example: void test(float * restrict out, float * restrict in1, float * restrict in2) { for (int i = 0; i < 128; i++) out[i] = __builtin_copysignf (in1[i], in2