.com
Subject: Re: [PATCH v1] RISC-V: Fix incorrect code gen for scalar signed
SAT_SUB [PR117688]
On 1/20/25 2:18 AM, pan2...@intel.com wrote:
> From: Pan Li
>
> This patch would like to fix the wroing code generation for the scalar
> signed SAT_SUB. The input can be QI/HI/SI/DI
On 1/20/25 2:18 AM, pan2...@intel.com wrote:
From: Pan Li
This patch would like to fix the wroing code generation for the scalar
signed SAT_SUB. The input can be QI/HI/SI/DI while the alu like sub
can only work on Xmode, thus we need to make sure the value of input
are well signed-extended
From: Pan Li
This patch would like to fix the wroing code generation for the scalar
signed SAT_SUB. The input can be QI/HI/SI/DI while the alu like sub
can only work on Xmode, thus we need to make sure the value of input
are well signed-extended at first. But the gen_lowpart will generate
somet
