../../gcc/config/riscv/riscv-vector-builtins.cc: In function 'rtx_def*
riscv_vector::expand_builtin(unsigned int, tree, rtx)':
../../gcc/config/riscv/riscv-vector-builtins.cc:4592:16: error: misspelled term
'builtin function' in format; use 'built-in function' instead
[-Werror=format-diag]
4592
Committed, thanks kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Monday, March 25, 2024 8:04 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Allow RVV intrinsic when function
target("arch=+v")
LG
LGTM, thanks :)
On Mon, Mar 25, 2024 at 3:42 PM wrote:
>
> From: Pan Li
>
> This patch would like to allow the RVV intrinsic when function is
> attributed as target("arch=+v") and build with rv64gc. For example:
>
> vint32m1_t
> __attribute__((target("arch=+v")))
> test_1 (vint32m1_t a, vint32m
From: Pan Li
This patch would like to allow the RVV intrinsic when function is
attributed as target("arch=+v") and build with rv64gc. For example:
vint32m1_t
__attribute__((target("arch=+v")))
test_1 (vint32m1_t a, vint32m1_t b, size_t vl)
{
return __riscv_vadd_vv_i32m1 (a, b, vl);
}
build w
