Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Saturday, June 10, 2023 11:03 AM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; rdapp@gmail.com;
jeffreya...@gmail.com; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Add test cases for RVV
LGTM :)
On Sat, Jun 10, 2023 at 7:59 AM Pan Li via Gcc-patches
wrote:
>
> From: Pan Li
>
> This patch would like to add more tests for RVV FP16 vreinterpret, aka
>
> vfloat16*_t <==> v{u}int16*_t.
>
> There we allow FP16 vreinterpret in ZVFHMIN consider we have vle FP16 already.
> It doesn't bre
From: Pan Li
This patch would like to add more tests for RVV FP16 vreinterpret, aka
vfloat16*_t <==> v{u}int16*_t.
There we allow FP16 vreinterpret in ZVFHMIN consider we have vle FP16 already.
It doesn't break anything in SPEC as there is no such vreinterpret insn.
>From the user's perspective
