RE: [PATCH v1] RISC-V: Add test case for unsigned scalar SAT_MUL form 4

2025-08-28 Thread Li, Pan2
; Li, Pan2 Subject: [PATCH v1] RISC-V: Add test case for unsigned scalar SAT_MUL form 4 From: Pan Li The form 4 of unsigned scalar SAT_MUL is covered in middle-expand alreay, add test case here to cover form 4. The below test suites are passed for this patch series. * The rv64gcv fully

[PATCH v1] RISC-V: Add test case for unsigned scalar SAT_MUL form 4

2025-08-24 Thread pan2 . li
From: Pan Li The form 4 of unsigned scalar SAT_MUL is covered in middle-expand alreay, add test case here to cover form 4. The below test suites are passed for this patch series. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat/sat_arith.h: Add test