On Wed, Aug 20, 2014 at 2:51 PM, Kirill Yukhin wrote:
> Hello Uroš,
> On 15 Aug 20:29, Uros Bizjak wrote:
>> Can you avoid insn constraints like:
>>
>> > + "TARGET_AVX512DQ && ( == 64 || TARGET_AVX512VL)"
>>
>> This should be split to two insn patterns, each with different
>> baseline insn constr
Hello Uroš,
On 15 Aug 20:29, Uros Bizjak wrote:
> Can you avoid insn constraints like:
>
> > + "TARGET_AVX512DQ && ( == 64 || TARGET_AVX512VL)"
>
> This should be split to two insn patterns, each with different
> baseline insn constraint.
I've splitted pattern into two similar w/ different mode
On Fri, Aug 15, 2014 at 1:52 PM, Kirill Yukhin wrote:
> Hello,
> This patch introduces new patterns to support
> AVX-512Vl,DQ broadcast insns.
>
> Bootstrapped.
> New tests on top of patch-set all pass
> under simulator.
>
> Is it ok for trunk?
>
> gcc/
> * config/i386/sse.md
> (de
Hello,
This patch introduces new patterns to support
AVX-512Vl,DQ broadcast insns.
Bootstrapped.
New tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_mode_iterator VI4F_BRCST32x2): New.
(define_mode_attr 64x2_mode):
