Re: [PATCH V2 2/2] RISC-V: Move mode assertion out of conditional branch in emit_insn

OK. Regards Robin

[PATCH V2 2/2] RISC-V: Move mode assertion out of conditional branch in emit_insn

When emitting insns, we have an early assertion to ensure the input operand's mode and the expanded operand's mode are the same; however, it does not perform this check if the pattern does not have an explicit machine mode specifying the operand. In this scenario, it will always assume that mode =