zhe.zh...@rivai.ai
>
> From: shiyulong
> Date: 2023-08-08 12:12
> To: gcc-patches
> CC: kito.cheng; wuwei2016; jiawei; shihua; chenyixuan; juzhe.zhong; pan2.li;
> yulong
> Subject: [PATCH V1] RISC-V: Fix a bug that causes an error insn.
> From: yulong
>
> I test the followi
gt; Date: 2023-08-08 12:12
> To: gcc-patches
> CC: kito.cheng; wuwei2016; jiawei; shihua; chenyixuan; juzhe.zhong; pan2.li;
> yulong
> Subject: [PATCH V1] RISC-V: Fix a bug that causes an error insn.
> From: yulong
>
> I test the following rvv intrinsics.
> vint64m1_t test_
] RISC-V: Fix a bug that causes an error insn.
From: yulong
I test the following rvv intrinsics.
vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t
value, size_t vl) {
return __riscv_vslide1up_vx_i64m1_m(mask, src, value, vl);}
And I got an error info,that is error
From: yulong
I test the following rvv intrinsics.
vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t
value, size_t vl) {
return __riscv_vslide1up_vx_i64m1_m(mask, src, value, vl);}
And I got an error info,that is error: unrecognizable insn:(insn 17 16 18 2
(set (reg:
