"Yangfei (Felix)" writes:
> Hi Richard,
>
> Thanks for reviewing this fix and the detailed suggestions : -)
> Looks like my colleague Yunde was having some issue setting up his local
> repo.
> I have prepared one for him. Attached please find the patch.
> Bootstrapped and tested
install if it's
good to go.
Felix
> -Original Message-
> From: Richard Sandiford [mailto:richard.sandif...@arm.com]
> Sent: Friday, July 31, 2020 5:33 PM
> To: Zhongyunde
> Cc: gcc-patches@gcc.gnu.org; Yangfei (Felix)
> Subject: Re: [PATCH PR95696] regrename creat
Thanks for the update, looks good. Could you post a changelog too
so that I can use it when committing?
The changelog was the only reason I didn't just push the patch,
but FWIW, a couple of very minor things…
Zhongyunde writes:
> diff --git a/gcc/regrename.c b/gcc/regrename.c
> old mode 100644
> -Original Message-
> From: Richard Sandiford [mailto:richard.sandif...@arm.com]
> Sent: Tuesday, July 28, 2020 1:33 AM
> To: Zhongyunde
> Cc: gcc-patches@gcc.gnu.org; Yangfei (Felix)
> Subject: Re: [PATCH PR95696] regrename creates overlapping register
>
s@gcc.gnu.org; Yangfei (Felix)
>> Subject: RE: [PATCH PR95696] regrename creates overlapping register
>> allocations for vliw
>>
>>
>> > >> It's interesting that this is for a testcase using SMS. One of the
>> > >> traditional problem
chard Sandiford'
> Cc: gcc-patches@gcc.gnu.org; Yangfei (Felix)
> Subject: RE: [PATCH PR95696] regrename creates overlapping register
> allocations for vliw
>
>
> > >> It's interesting that this is for a testcase using SMS. One of the
> > >> tradition
> >> It's interesting that this is for a testcase using SMS. One of the
> >> traditional problems with the GCC implementation of SMS has been
> >> ensuring that later passes don't mess up the scheduled loop. So in
> >> your testcase, does register allocation succeed for the SMS loop
> >> without
Zhongyunde writes:
>> -Original Message-
>> From: Richard Sandiford [mailto:richard.sandif...@arm.com]
>> Sent: Wednesday, July 22, 2020 12:12 AM
>> To: Zhongyunde
>> Cc: gcc-patches@gcc.gnu.org; Yangfei (A)
>> Subject: Re: 答复: [PATCH PR95696] regre
> -Original Message-
> From: Richard Sandiford [mailto:richard.sandif...@arm.com]
> Sent: Wednesday, July 22, 2020 12:12 AM
> To: Zhongyunde
> Cc: gcc-patches@gcc.gnu.org; Yangfei (A)
> Subject: Re: 答复: [PATCH PR95696] regrename creates overlapping
> register
Zhongyunde writes:
> Thanks for your review.
>
> First of all, this is an optimization.
OK, good.
>gcc do sms before reload, and here each insn use pseudo-register. After
> reload, they are allocated hard-register, then the regrename pass try to
> adjust the register number with def/use ch
rm.com]
发送时间: 2020年7月21日 0:05
收件人: Zhongyunde
抄送: gcc-patches@gcc.gnu.org; Yangfei (A)
主题: Re: [PATCH PR95696] regrename creates overlapping register allocations for
vliw
Hi,
Zhongyunde writes:
> Hi，
>
> In most target, it is limited to issue two insns with change the same
> regi
Hi,
Zhongyunde writes:
> Hi，
>
> In most target, it is limited to issue two insns with change the same
> register. So a register is not realy unused if there is another insn, which
> set the register in the save VLIW.
>
> For example, The insn 73 start with insn:TI, so it will be issued togethe
Hi，
In most target, it is limited to issue two insns with change the same register.
So a register is not realy unused if there is another insn, which set the
register in the save VLIW.
For example, The insn 73 start with insn:TI, so it will be issued together with
others insns until a new insn
hi, Insometarget,itislimitedtoissuetwoinsnstogetherwithchangethesameregister,so Imakeapatchtoextendtheliverangeuntiltheendofvliwtoavoidit.(Theinsn73startwithinsn:TI,soitwillbeissuedtogetherwithothersinsnsuntilanewinsnstartwithinsn:TI,suchasinsn71)TheregrenamecanknownthemodeV2VFininsn73needtwosucc
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