"Pinski, Andrew" writes:
> + /* If TARGET_64BIT, the destination of a 32-bit "extz" or "extzv" will
> + be a DImode, create a new temp and emit a zero extend at the end. */
"emit an extend", since it can be signed or unsigned. OK with that change.
Nice optimisation, thanks.
Richard
Hi,
Currently doing a 32bit unaligned load on MIPS64, produces 4 byte loads, this
can be improved to using lwl/lwr instead. The problem is the code in
mips_expand_ext_as_unaligned_load that handles this case does handle the case
where the register is DImode but the width is 32.
This patch fi
