Re: [PATCH AArch64]Fix ICE in cortex-a57 fma steering pass

2017-07-24 Thread James Greenhalgh
On Thu, Jul 20, 2017 at 09:53:41AM +0100, Bin.Cheng wrote: > On Fri, Jul 14, 2017 at 12:12 PM, James Greenhalgh > wrote: > > On Wed, Jul 12, 2017 at 03:15:04PM +, Bin Cheng wrote: > >> Hi, > >> After change @236817, AArch64 backend could avoid unnecessary conversion > >> instructions for regis

Re: [PATCH AArch64]Fix ICE in cortex-a57 fma steering pass

2017-07-20 Thread Bin.Cheng
On Fri, Jul 14, 2017 at 12:12 PM, James Greenhalgh wrote: > On Wed, Jul 12, 2017 at 03:15:04PM +, Bin Cheng wrote: >> Hi, >> After change @236817, AArch64 backend could avoid unnecessary conversion >> instructions for register between different modes now. As a result, GCC >> could initialize

Re: [PATCH AArch64]Fix ICE in cortex-a57 fma steering pass

2017-07-14 Thread James Greenhalgh
On Wed, Jul 12, 2017 at 03:15:04PM +, Bin Cheng wrote: > Hi, > After change @236817, AArch64 backend could avoid unnecessary conversion > instructions for register between different modes now. As a result, GCC > could initialize register in larger mode and use it later in smaller mode. > such

[PATCH AArch64]Fix ICE in cortex-a57 fma steering pass

2017-07-12 Thread Bin Cheng
Hi, After change @236817, AArch64 backend could avoid unnecessary conversion instructions for register between different modes now. As a result, GCC could initialize register in larger mode and use it later in smaller mode. such def-use chain is not supported by current regrename.c analyzer, a